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标题: 基站0改动ANCHOR_IND 0后，初始化错误 [打印本页]

作者: gardenTED 时间: 2021-4-28 10:46
标题: 基站0改动ANCHOR_IND 0后，初始化错误
stmf103修改基站0的代码为ANCHOR_IND 0后，液晶显示int fall，请问如何解决？
if(dwt_initialise(DWT_LOADUCODE) == -1) //init
{
      printf("dwm1000 init fail!\r\n");
      OLED_ShowString(0,0,"INIT FAIL",16);
OLED_Refresh();
      while (1)
      {

         STM_EVAL_LEDOn(LED1);
         deca_sleep(100);
         STM_EVAL_LEDOff(LED1);
         deca_sleep(100);
      }
}

作者: gardenTED 时间: 2021-4-28 10:48
int dwt_initialise(uint16 config)
{
uint8 plllockdetect = EC_CTRL_PLLLCK;
uint16 otp_addr = 0;
uint32 ldo_tune = 0;

dw1000local.dblbuffon = 0; // Double buffer mode off by default
dw1000local.prfIndex = 0; // 16MHz
dw1000local.cdata.aatset = 0; // Auto ACK bit not set
dw1000local.wait4resp = 0;
dw1000local.sleep_mode = 0;

dw1000local.dwt_txcallback = NULL ;
dw1000local.dwt_rxcallback = NULL ;

// Read and validate device ID return -1 if not recognised
dw1000local.deviceID =  dwt_readdevid() ;
if (DWT_DEVICE_ID != dw1000local.deviceID) // MP IC ONLY (i.e. DW1000) FOR THIS CODE
{
GPIO_ResetBits(GPIOA,GPIO_Pin_1);
GPIO_ResetBits(GPIOA,GPIO_Pin_2);
      return DWT_ERROR ;
}

_dwt_enableclocks(FORCE_SYS_XTI); // NOTE: set system clock to XTI - this is necessary to make sure the values read by _dwt_otpread are reliable

// Configure the CPLL lock detect
dwt_writetodevice(EXT_SYNC_ID, EC_CTRL_OFFSET, 1, &plllockdetect);

// Read OTP revision number
otp_addr = _dwt_otpread(XTRIM_ADDRESS) & 0xffff;       // Read 32 bit value, XTAL trim val is in low octet-0 (5 bits)
dw1000local.otprev = (otp_addr >> 8) & 0xff; // OTP revision is next byte

// Load LDO tune from OTP and kick it if there is a value actually programmed.
ldo_tune = _dwt_otpread(LDOTUNE_ADDRESS);
if((ldo_tune & 0xFF) != 0)
{
uint8 ldok = OTP_SF_LDO_KICK;
// Kick LDO tune
dwt_writetodevice(OTP_IF_ID, OTP_SF, 1, &ldok); // Set load LDE kick bit
dw1000local.sleep_mode |= AON_WCFG_ONW_LLDO; // LDO tune must be kicked at wake-up
}

// Load Part and Lot ID from OTP
dw1000local.partID = _dwt_otpread(PARTID_ADDRESS);
dw1000local.lotID = _dwt_otpread(LOTID_ADDRESS);

// XTAL trim value is set in OTP for DW1000 module and EVK/TREK boards but that might not be the case in a custom design
dw1000local.xtrim = otp_addr & 0x1F;
if (!dw1000local.xtrim) // A value of 0 means that the crystal has not been trimmed
{
      dw1000local.xtrim = FS_XTALT_MIDRANGE ; // Set to mid-range if no calibration value inside
}
// Configure XTAL trim
dwt_xtaltrim(dw1000local.xtrim);

// Load leading edge detect code
if(config & DWT_LOADUCODE)
{
      _dwt_loaducodefromrom();
      dw1000local.sleep_mode |= AON_WCFG_ONW_LLDE; // microcode must be loaded at wake-up
}
else // Should disable the LDERUN enable bit in 0x36, 0x4
{
uint16 rega = dwt_read16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET+1) ;
rega &= 0xFDFF ; // Clear LDERUN bit
dwt_write16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET+1, rega) ;
}

_dwt_enableclocks(ENABLE_ALL_SEQ); // Enable clocks for sequencing

// Read system register / store local copy
dw1000local.sysCFGreg = dwt_read32bitreg(SYS_CFG_ID) ; // Read sysconfig register

return DWT_SUCCESS ;

} // end dwt_initialise()

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